From 6fca8abef7e6d7be1a9e6d93dd0f2b7fbc5b28e5 Mon Sep 17 00:00:00 2001
From: Pasha <pasha@member.fsf.org>
Date: Tue, 20 Feb 2024 18:55:36 +0000
Subject: initial risc-v example

---
 riscv/README | 80 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 80 insertions(+)
 create mode 100644 riscv/README

(limited to 'riscv/README')

diff --git a/riscv/README b/riscv/README
new file mode 100644
index 0000000..b119c91
--- /dev/null
+++ b/riscv/README
@@ -0,0 +1,80 @@
+
+setup riscv-gnu-toolchain
+--------------------------
+$ git clone https://github.com/riscv-collab/riscv-gnu-toolchain
+$ ./configure --prefix=/opt/riscv
+$ make
+
+
+setup opensbi
+--------------
+git clone https://github.com/riscv-software-src/opensbi.git
+cd opensbi
+make ARCH=riscv CROSS_COMPILE=riscv64-unknown-elf- PLATFORM=generic
+
+
+setup mig
+---------
+TARGET_CPPFLAGS=-I"$GNU"/include ../configure --prefix="$GNU" --target=riscv64-unknown-elf  TARGET_CC=riscv64-unknown-elf-gcc
+
+setup gnumach
+--------------
+$ mkdir build
+$ cd build
+$ ../configure --prefix= --host=riscv64-unknown-elf LD=riscv64-unknown-elf-ld CC=riscv64-unknown-elf-gcc
+$ make gnumach
+
+You may need to setup libc6-dev-riscv64-cross
+
+run it qemu
+-----------
+qemu-system-riscv64 -M virt -m 128M -nographic -bios YOUR_PATH/opensbi/build/platform/generic/firmware/fw_dynamic.bin -kernel gnumach
+
+
+adjusted for gnumach
+---------------------
+linux-6.x.x/arch/riscv/kernel/head.S ->  gnumach/riscv/riscv/boothdr.S
+
+linux-6.x.x/arch/riscv/include/asm/  -> gnumach/riscv/include/asm/
+linux-6.x.x/arch/riscv/include/uapi/ -> gnumach/riscv/include/uapi/
+
+You will find in some header files "#include <generated/*>"
+This generated directory will be generated after you configure/build linux kernel.
+
+    $ make ARCH=riscv CROSS_COMPILE=riscv64-unknown-linux-gnu- defconfig
+
+You may need to install "gcc-riscv64-linux-gnu", if "riscv64-unknown-elf" fails to configure/build linux kernel.
+
+warning:
+--------
+This is *not* the directory where all the necessary files will be generated - "linux-6.x.x/arch/riscv/include/generated/"
+Instead you need to check - "linux-6.x.x/include/generated/" (specially for files like asm-offsets.h).
+
+linux-6.x.x/include/generated/       -> gnumach/riscv/include/generated/
+
+
+links added for asm, uapi, and generated, in gnumach/riscv/configfrag.ac
+
+AC_CONFIG_LINKS([asm:$systype/include/asm
+                 uapi:$systype/include/uapi
+		 generated:$systype/include/generated])
+
+
+Pending implementations
+-----------------------
+gnumach/riscv/riscv/{const.h, setup.c}
+
+
+resources in sifive.com blog
+-----------------------------
+https://www.sifive.com/blog/all-aboard-part-1-compiler-args
+https://www.sifive.com/blog/all-aboard-part-2-relocations
+https://www.sifive.com/blog/all-aboard-part-3-linker-relaxation-in-riscv-toolchain
+https://www.sifive.com/blog/all-aboard-part-4-risc-v-code-models
+https://www.sifive.com/blog/all-aboard-part-5-risc-v-multilib
+https://www.sifive.com/blog/all-aboard-part-6-booting-a-risc-v-linux-kernel
+https://www.sifive.com/blog/all-aboard-part-7-entering-and-exiting-the-linux-kernel-on-risc-v
+https://www.sifive.com/blog/all-aboard-part-8-the-risc-v-linux-port-is-upstream
+https://www.sifive.com/blog/all-aboard-part-9-paging-and-mmu-in-risc-v-linux-kernel
+https://www.sifive.com/blog/all-aboard-part-10-how-to-contribute-to-the-risc-v-software-ecosystem
+https://www.sifive.com/blog/all-aboard-part-11-risc-v-hackathon-presented-by-sifive
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