From 6fca8abef7e6d7be1a9e6d93dd0f2b7fbc5b28e5 Mon Sep 17 00:00:00 2001
From: Pasha <pasha@member.fsf.org>
Date: Tue, 20 Feb 2024 18:55:36 +0000
Subject: initial risc-v example

---
 riscv/include/asm/crash_core.h | 11 +++++++++++
 1 file changed, 11 insertions(+)
 create mode 100644 riscv/include/asm/crash_core.h

(limited to 'riscv/include/asm/crash_core.h')

diff --git a/riscv/include/asm/crash_core.h b/riscv/include/asm/crash_core.h
new file mode 100644
index 0000000..e1874b2
--- /dev/null
+++ b/riscv/include/asm/crash_core.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef _RISCV_CRASH_CORE_H
+#define _RISCV_CRASH_CORE_H
+
+#define CRASH_ALIGN			PMD_SIZE
+
+#define CRASH_ADDR_LOW_MAX		dma32_phys_limit
+#define CRASH_ADDR_HIGH_MAX		memblock_end_of_DRAM()
+
+extern phys_addr_t memblock_end_of_DRAM(void);
+#endif
-- 
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