From 6fca8abef7e6d7be1a9e6d93dd0f2b7fbc5b28e5 Mon Sep 17 00:00:00 2001 From: Pasha Date: Tue, 20 Feb 2024 18:55:36 +0000 Subject: initial risc-v example --- riscv/include/asm/delay.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 riscv/include/asm/delay.h (limited to 'riscv/include/asm/delay.h') diff --git a/riscv/include/asm/delay.h b/riscv/include/asm/delay.h new file mode 100644 index 0000000..524f8ef --- /dev/null +++ b/riscv/include/asm/delay.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2009 Chen Liqin + * Copyright (C) 2016 Regents of the University of California + */ + +#ifndef _ASM_RISCV_DELAY_H +#define _ASM_RISCV_DELAY_H + +extern unsigned long riscv_timebase; + +#define udelay udelay +extern void udelay(unsigned long usecs); + +#define ndelay ndelay +extern void ndelay(unsigned long nsecs); + +extern void __delay(unsigned long cycles); + +#endif /* _ASM_RISCV_DELAY_H */ -- cgit v1.2.1