From 6fca8abef7e6d7be1a9e6d93dd0f2b7fbc5b28e5 Mon Sep 17 00:00:00 2001
From: Pasha <pasha@member.fsf.org>
Date: Tue, 20 Feb 2024 18:55:36 +0000
Subject: initial risc-v example

---
 riscv/include/asm/entry-common.h | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)
 create mode 100644 riscv/include/asm/entry-common.h

(limited to 'riscv/include/asm/entry-common.h')

diff --git a/riscv/include/asm/entry-common.h b/riscv/include/asm/entry-common.h
new file mode 100644
index 0000000..7ab5e34
--- /dev/null
+++ b/riscv/include/asm/entry-common.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef _ASM_RISCV_ENTRY_COMMON_H
+#define _ASM_RISCV_ENTRY_COMMON_H
+
+#include <asm/stacktrace.h>
+
+void handle_page_fault(struct pt_regs *regs);
+void handle_break(struct pt_regs *regs);
+
+#ifdef CONFIG_RISCV_MISALIGNED
+int handle_misaligned_load(struct pt_regs *regs);
+int handle_misaligned_store(struct pt_regs *regs);
+#else
+static inline int handle_misaligned_load(struct pt_regs *regs)
+{
+	return -1;
+}
+static inline int handle_misaligned_store(struct pt_regs *regs)
+{
+	return -1;
+}
+#endif
+
+#endif /* _ASM_RISCV_ENTRY_COMMON_H */
-- 
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