From 6fca8abef7e6d7be1a9e6d93dd0f2b7fbc5b28e5 Mon Sep 17 00:00:00 2001 From: Pasha Date: Tue, 20 Feb 2024 18:55:36 +0000 Subject: initial risc-v example --- riscv/include/asm/fence.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 riscv/include/asm/fence.h (limited to 'riscv/include/asm/fence.h') diff --git a/riscv/include/asm/fence.h b/riscv/include/asm/fence.h new file mode 100644 index 0000000..2b443a3 --- /dev/null +++ b/riscv/include/asm/fence.h @@ -0,0 +1,12 @@ +#ifndef _ASM_RISCV_FENCE_H +#define _ASM_RISCV_FENCE_H + +#ifdef CONFIG_SMP +#define RISCV_ACQUIRE_BARRIER "\tfence r , rw\n" +#define RISCV_RELEASE_BARRIER "\tfence rw, w\n" +#else +#define RISCV_ACQUIRE_BARRIER +#define RISCV_RELEASE_BARRIER +#endif + +#endif /* _ASM_RISCV_FENCE_H */ -- cgit v1.2.1