From 6fca8abef7e6d7be1a9e6d93dd0f2b7fbc5b28e5 Mon Sep 17 00:00:00 2001
From: Pasha <pasha@member.fsf.org>
Date: Tue, 20 Feb 2024 18:55:36 +0000
Subject: initial risc-v example

---
 riscv/include/asm/mmiowb.h | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
 create mode 100644 riscv/include/asm/mmiowb.h

(limited to 'riscv/include/asm/mmiowb.h')

diff --git a/riscv/include/asm/mmiowb.h b/riscv/include/asm/mmiowb.h
new file mode 100644
index 0000000..0b2333e
--- /dev/null
+++ b/riscv/include/asm/mmiowb.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef _ASM_RISCV_MMIOWB_H
+#define _ASM_RISCV_MMIOWB_H
+
+/*
+ * "o,w" is sufficient to ensure that all writes to the device have completed
+ * before the write to the spinlock is allowed to commit.
+ */
+#define mmiowb()	__asm__ __volatile__ ("fence o,w" : : : "memory");
+
+#include <linux/smp.h>
+#include <asm-generic/mmiowb.h>
+
+#endif	/* _ASM_RISCV_MMIOWB_H */
-- 
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