From 6fca8abef7e6d7be1a9e6d93dd0f2b7fbc5b28e5 Mon Sep 17 00:00:00 2001 From: Pasha Date: Tue, 20 Feb 2024 18:55:36 +0000 Subject: initial risc-v example --- riscv/include/asm/sparsemem.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) create mode 100644 riscv/include/asm/sparsemem.h (limited to 'riscv/include/asm/sparsemem.h') diff --git a/riscv/include/asm/sparsemem.h b/riscv/include/asm/sparsemem.h new file mode 100644 index 0000000..63acaec --- /dev/null +++ b/riscv/include/asm/sparsemem.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef _ASM_RISCV_SPARSEMEM_H +#define _ASM_RISCV_SPARSEMEM_H + +#ifdef CONFIG_SPARSEMEM +#ifdef CONFIG_64BIT +#define MAX_PHYSMEM_BITS 56 +#else +#define MAX_PHYSMEM_BITS 34 +#endif /* CONFIG_64BIT */ +#define SECTION_SIZE_BITS 27 +#endif /* CONFIG_SPARSEMEM */ + +#endif /* _ASM_RISCV_SPARSEMEM_H */ -- cgit v1.2.1