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| author | Pasha <pasha@member.fsf.org> | 2024-02-20 18:55:36 +0000 |
|---|---|---|
| committer | Pasha <pasha@member.fsf.org> | 2024-02-20 18:55:36 +0000 |
| commit | 6fca8abef7e6d7be1a9e6d93dd0f2b7fbc5b28e5 (patch) | |
| tree | 9f5ccbaa6ec19ff5a42d9b3cde01f739e1d7c77d /riscv/include/asm/vdso/processor.h | |
| parent | 5e0b8d508ed51004bd836384293be00950ee62c9 (diff) | |
| download | gnumach-riscv-master.tar.gz gnumach-riscv-master.tar.bz2 | |
Diffstat (limited to 'riscv/include/asm/vdso/processor.h')
| -rw-r--r-- | riscv/include/asm/vdso/processor.h | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/riscv/include/asm/vdso/processor.h b/riscv/include/asm/vdso/processor.h new file mode 100644 index 0000000..96b65a5 --- /dev/null +++ b/riscv/include/asm/vdso/processor.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef __ASM_VDSO_PROCESSOR_H +#define __ASM_VDSO_PROCESSOR_H + +#ifndef __ASSEMBLY__ + +#include <asm/barrier.h> + +static inline void cpu_relax(void) +{ +#ifdef __riscv_muldiv + int dummy; + /* In lieu of a halt instruction, induce a long-latency stall. */ + __asm__ __volatile__ ("div %0, %0, zero" : "=r" (dummy)); +#endif + +#ifdef CONFIG_TOOLCHAIN_HAS_ZIHINTPAUSE + /* + * Reduce instruction retirement. + * This assumes the PC changes. + */ + __asm__ __volatile__ ("pause"); +#else + /* Encoding of the pause instruction */ + __asm__ __volatile__ (".4byte 0x100000F"); +#endif + barrier(); +} + +#endif /* __ASSEMBLY__ */ + +#endif /* __ASM_VDSO_PROCESSOR_H */ |