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| author | Pasha <pasha@member.fsf.org> | 2024-02-20 18:55:36 +0000 |
|---|---|---|
| committer | Pasha <pasha@member.fsf.org> | 2024-02-20 18:55:36 +0000 |
| commit | 6fca8abef7e6d7be1a9e6d93dd0f2b7fbc5b28e5 (patch) | |
| tree | 9f5ccbaa6ec19ff5a42d9b3cde01f739e1d7c77d /riscv/include/asm/mmiowb.h | |
| parent | 5e0b8d508ed51004bd836384293be00950ee62c9 (diff) | |
| download | gnumach-riscv-master.tar.gz gnumach-riscv-master.tar.bz2 | |
Diffstat (limited to 'riscv/include/asm/mmiowb.h')
| -rw-r--r-- | riscv/include/asm/mmiowb.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/riscv/include/asm/mmiowb.h b/riscv/include/asm/mmiowb.h new file mode 100644 index 0000000..0b2333e --- /dev/null +++ b/riscv/include/asm/mmiowb.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef _ASM_RISCV_MMIOWB_H +#define _ASM_RISCV_MMIOWB_H + +/* + * "o,w" is sufficient to ensure that all writes to the device have completed + * before the write to the spinlock is allowed to commit. + */ +#define mmiowb() __asm__ __volatile__ ("fence o,w" : : : "memory"); + +#include <linux/smp.h> +#include <asm-generic/mmiowb.h> + +#endif /* _ASM_RISCV_MMIOWB_H */ |